What are Interrupt Requests (IRQ)

Before you start

Objectives: Learn what are IRQs, why are they used, what are default IRQ assignments, and how are they configured.

Prerequisites: no prerequisites.

Key terms: interrupt, device, pic, wire, cpu, irq, chip, time, assigned, default, method, controller

Introduction to IRQ

IRQ is the method which devices use to interrupt the CPU and request processing time. There are actually two general ways in which devices can get processing time from the CPU. The first method we will mentioned is called polling. Note that this method is not used any more. Pooling gives each device a certain amount of time to interact with the CPU. Every device gets its chance, whether or not the device actually wants to communicate with the CPU. When the certain amount of time passes, the next device gets a chance to interact with the CPU. So, with polling each device in the system can interact with the CPU for a fixed amount of time, whether or not that device actually needs to communicate with the CPU, and whether or not there is enough time for device to send all messages to the CPU.

The second method of implementing communication between the CPU and other devices in the system is called interruption. With this method only the devices which have to interact with the CPU uses the CPUs time. Devices can use as much time as they need.

Devices in our computer need to get the CPUs attention when they have work to do. Older systems used the polling method, which was not very efficient way. Modern PCs use the interruption method. Interruption method is implemented by using Interrupt Request Channels (IRQs). IRQs allow a particular device in the system to get the CPUs attention.

How IRQ Works

The first thing we have to know is that every expansion slot, every device or controller on the motherboard has one wire implemented which we call theinterrupt wire. This wire is typically labeled as “INT”, and it is attached to the CPU. Whenever current is applied to the interrupt wire, the connected device gets the CPUs attention. The INT wire goes to the specific pin on the CPU. When the CPU detects the current on that pin, it will try to service the requesting device.

The problem is that the CPU only has one physical interrupt connector, and the CPU typically has to service a lot of devices on the system. All systems today have more than one device. To accommodate multiple devices we actually use additional chip called the Programmable Interrupt Controller (PIC). The PIC is placed between the CPU and other devices in the system. The interrupt wire from each device is connected to the PIC chip. That way we have multiple devices which can interrupt the CPU over the PIC chip.



Device that needs attention applies current to its interrupt wire, but instead of going straight to the CPU, that current is picked up by the PIC chip. The PIC chip then applies current to the CPUs interrupt wire. The CPU acknowledges the interrupt to the PIC, and the PIC then tells the CPU which device actually requested the interrupt. The CPU will then service the request from the device.

Remember that every device in the PC system needs to have an IRQ assigned to it. If the device doesn’t have an IRQ, it cannot be serviced by the CPU. Also, two devices can’t share the same interrupt channel, but we have an exception to that rule. For example, PCI devices can share interrupts, but other types of devices can not. Older PC systems used 8 bit ISA bus. That meant it had eight interrupts coming from the PIC chip, so we could have a maximum of 8 different devices attached to the bus. Modern computers have 16 interrupts. Eight interrupts are added by cascading two PIC chips together.


Two PICs

The interrupt wire from the second PIC chip is attached to the second interrupt wire on the first PIC chip. The second interrupt wire on the second PIC chip is connected to the second interrupt wire on the motherboard itself. By doing this we theoretically get 16 IRQs. However, because we have cascaded two PICs, we actually only have 15 usable interrupts. The first PIC in the system services interrupts zero through seven, and the second PIC services interrupts 8 through 15.

Default IRQs

Interrupt wire 0 (zero) is always assigned to the system clock (timing pulse). Interrupt 1 is used by the keyboard. Interrupt 2 is unused (it is cascaded to PIC 2). Interrupt 3 is assigned to COM2 and COM4 serial ports, and Interrupt 4 is assigned to COM1 and COM3 serial ports. Interrupt 5 is assigned to the second parallel port, LPT2 (this interrupt is often free so it is used for a sound card). Interrupt 6 is assigned to the floppy disk drive. Interrupt 7 is assigned to LPT1, first parallel port. Interrupt 8 is assigned to the real time clock. Interrupt 9 is often used by USB. Interrupt 10 is available. Interrupt 11 is often used for network cards. Interrupt 12 is often used for mouse. Interrupt 13 is used for math coprocessor. Interface 14 is used for primary IDE interface, and interrupt 15 is used for secondary IDE interface.


Available IRQs

When talking about interrupts 2 and 9, we are talking about cascaded PICs. The two PICs are linked via IRQs 2 and 9. Interrupt wire from the PIC 2 goes into the second interrupt wire on the PIC 1. Because of that, the second interrupt wire on the PIC 1 can’t be used by any other device in the system. The interrupt 9 on the PIC 2 is used to service the device in our system instead of the interrupt 2 wire on the PIC 1. That’s because wires 2 and 9 are actually the same wire. If we assign wire 2 to some device, the system will substitute it with wire 9 which is on the second PIC. Remember that because of the cascading, wire 2 and wire 9 are actually the same wire.

Interrupt wires 0, 1 and 8 are physically hard wired on the motherboard. That means that we can not reassign them. Other default interrupts can be used if the default device is not installed in the system. For example, if our motherboard doesn’t have parallel port installed, IRQs 5 and 7 are freely available. The same is with the serial ports, even though they are all part of the default IRQ assignment.

The Advantage of PCI Bus

Before the emergence of PCI bus, the interrupts were quite a problem since there were never enough interrupts for all the devices in the system. With the PCI expansion bus different devices in the system can actually share the same interrupt. So, the PCI bus breaks the rule which said that no two devices can share the same interrupt channel.

How to Configure IRQs

On non plug-and-play systems we have to manually configure each device with its own IRQ. This is usually done via jumpers or a programmable EEPROM on the device. If we configure two different devices with the same IRQ, an IRQ conflict will occur. IRQ conflicts can cause random system lockups. An IRQ for a plug-and-play device is set via the software driver installation program for that device.
IRQ sharing is handled automatically by the operating system. For example, a USB controller on a computer generally uses IRQ 9, but we can connect up to 127 USB devices to the single USB controller. Therefore, all devices on that single USB controller will also use IRQ 9.